An interface circuit of this type is sufficiently well known and is described in “System Engineering Automotive Application Note, Reverse Polarity Protection for ECU (PROFET BTSxxx, Microcontroller C16x, TLE426x)”, 01.99, Rel 01, Infineon Technologies AG, Munich, for example.
FIG. 1 shows an interface circuit of this type. This interface circuit has two supply inputs, a first supply input IN_VDD for applying a first supply potential VDDext and a second supply input IN_VSS for applying a second supply potential VSSext. By way of example, the first supply potential VDDext is a positive supply potential, whereas the second supply potential VSSext is a negative supply potential or reference-ground potential, particularly ground. The interface circuit 1 also has data inputs IN_D1, IN_Dn for supplying data signals S1, Sn, which are provided by a second circuit 2, for example. A power supply circuit 20, which may be in the form of a voltage regulator, in particular, is designed to take an internal supply potential VDDint, which is available at the first supply input IN_VDD in the interface circuit 1, and to generate a regulated supply voltage VDD which is used to supply power to further circuit components, for example a signal processing circuit 80 which is connected to the interface circuit 1. This signal processing circuit 80 may contain an input stage 81 and a processing stage 82. By way of example, the input stage 81 is used to convert the signals applied to the data inputs IN_D1, IN_Dn into signals with signal levels which are suitable for the processing in the processing stage 82.
Connected between the data inputs IN_D1, IN_Dn and the supply inputs IN_VDD, IN_VSS is an ESD protective circuit 10 whose task is to protect the data inputs IN_D1, IN_Dn against overvoltages. In this case, a diode 11, 12, 13, 14 is connected between each of the data inputs IN_D1, IN_Dn and each of the supply inputs IN_VDD, IN_VSS. The diodes 11, 13 connected between the data inputs IN_D1, IN_Dn and the first supply input IN_VDD ensure that the potentials at the data inputs IN_D1, IN_Dn can rise above the value of the positive supply potential VDDext by no more than the value of the forward voltage of a diode. The diodes 12, 14 connected between the second supply input IN_VSS and the respective data inputs IN_D1, IN_Dn ensure that the potentials on the data inputs IN_D1, IN_Dn can drop below the negative supply potential or reference-ground potential VSSext by no more than the value of the forward voltage of a diode. To protect an overvoltage between the supply inputs IN_VDD, IN_VSS, there is optionally also a zener diode 15 connected between these supply inputs.
An error situation will now be considered in which the power supply for the circuit 1 is interrupted, whether by an interruption in an external connecting line connected to the first supply input IN_VDD or by an interruption in a line connected to the first supply input IN_VDD internally in the circuit 1. Such interruptions in the supply line are shown schematically in FIG. 1 and are denoted by the reference symbols 101, 102.
A power supply for the circuit, i.e. the generation of a supply voltage VDD via the power supply arrangement 20, can still be ensured under certain conditions, specifically via the data inputs IN_D1, IN_Dn, when such an error occurs. The data signals D1, Dn applied to these inputs each comprise a series of voltage pulses which can assume a lower and an upper signal level. If the internal supply potential VDDint drops as a result of an interruption in the external supply, the diodes 11, 13 are operated in the forward direction when the data signals have upper signal levels, which means that despite the interrupted external supply an internal supply potential VDDint which is not equal to zero is applied to an input 21 of the power supply arrangement 20, which generates the supply voltage VDD from it.
However, it is normally not desirable for the internal supply potential VDDint to be maintained via the data inputs in this way. Although an operational circuit is simulated externally, supplying power to the circuit 1 via the data inputs IN_D1, IN_Dn and the parasitic current paths via the diodes 11, 13 of the protective circuit 10 produces operating conditions which, in the long term, can result in the circuit being damaged or even destroyed. By way of example, the diodes 11-15 in the protective circuit 10 are normally not designed for permanently flowing currents, which means that they can heat up to an impermissible extent in the event of a permanent flow of current. If the circuit 1 is in the form of an integrated circuit on a semiconductor substrate, depending on the implementation of the diodes there may also be a permanent flow of currents into the substrate, which in turn can have an adverse effect on the operation of other circuit components integrated on this substrate. Finally, one result may be that the power supply arrangement 20 is not or not permanently capable of generating the supply voltage VDD in stable fashion from an internal supply potential VDDint which results from the data signals S1, Sn, which can lead to malfunctions in the signal processing circuit 82 which the power supply arrangement 20 feeds.
It is therefore necessary to be able to identify such an interruption in the power supply in good time. This could be done by comparing the voltage VDDint applied to the supply input IN_VDD internally with a threshold voltage in order to be able to identify a drop in this voltage after a line interruption. However, such a comparison is difficult to implement if the circuit 1 permits a relatively wide supply voltage range for the supply voltage, which corresponds to the difference between the first and second supply potentials VDDext, VSSext, that is to say if the power supply circuit 20 is designed to generate the regulated supply voltage VDD from a varying input voltage.
In addition, the data inputs IN_D1, IN_Dn could have series resistors connected upstream of them which, if the supply voltage at the first supply input IN_VDD intermits, would prevent the circuit from being supplied with power via the data inputs IN_D1, IN_Dn and the parasitic current paths of the diodes 11, 13 in the protective circuit 10. However, such resistors increase the implementation costs of the circuit and also impair the input signals on the data inputs.
Such resistors could also be connected as integrated resistors in series with the diodes of the protective circuit 10. However, there is the risk that these resistors can be destroyed by peak currents, as occur in the case of electrostatic discharges (ESDs), for example.
It would therefore be advantageous to provide an interface circuit having at least one supply input for supplying a supply potential and having at least one data input for supplying a data signal and also having a protective circuit connected between the at least one data input and the at least one supply input and having a power supply circuit connected to the at least one supply input, in which an interruption in a power supply on the at least one supply input can be detected without giving rise to the drawbacks mentioned at the outset.